Path:OKDatasheet > Semiconductor Datasheet > Lattice Datasheet > M5LV-320/120-7YC
M5LV-320/120-7YC specification: 7ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
Path:OKDatasheet > Semiconductor Datasheet > Lattice Datasheet > M5LV-320/120-7YC
M5LV-320/120-7YC specification: 7ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
Tillverkare : Lattice
Packing : PQFP
Pins : 100
Temperature : Min 0 °C | Max 70 °C
Storlek : 1126 KB
Ansökan : 7ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)