Path:OKDatasheet > Semiconductor Datasheet > Lattice Datasheet > M5LV-512/120-20YI
M5LV-512/120-20YI specification: 20ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
Path:OKDatasheet > Semiconductor Datasheet > Lattice Datasheet > M5LV-512/120-20YI
M5LV-512/120-20YI specification: 20ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
Tillverkare : Lattice
Packing : PQFP
Pins : 100
Temperature : Min -40 °C | Max 85 °C
Storlek : 1126 KB
Ansökan : 20ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)