Path:OKDatasheet > Semiconductor Datasheet > Lattice Datasheet > MACHLV210-15JC
MACHLV210-15JC specification: High density EE CMOS programmable logic, 64 macrocells, 32 outputs, 64 flip-flops; 2 clock choices, 15ns
Path:OKDatasheet > Semiconductor Datasheet > Lattice Datasheet > MACHLV210-15JC
MACHLV210-15JC specification: High density EE CMOS programmable logic, 64 macrocells, 32 outputs, 64 flip-flops; 2 clock choices, 15ns
Tillverkare : Lattice
Packing : PLCC
Pins : 44
Temperature : Min 0 °C | Max 70 °C
Storlek : 243 KB
Ansökan : High density EE CMOS programmable logic, 64 macrocells, 32 outputs, 64 flip-flops; 2 clock choices, 15ns